The present invention relates to the deposition of dielectric layers during semiconductor substrate processing. More specifically, the present invention relates to a method and apparatus for controlling the intrinsic stress in deposited layers. The method of the present invention is particularly useful in reducing the intrinsic stress of silicon oxide layers deposited by high density plasma chemical vapor deposition (HDP-CVD) techniques, but may be also applied to silicon oxide layers formed using other deposition methods, as well as to the deposition of silicon nitride and other layers.
One of the primary steps in the fabrication of modern semiconductor devices is the formation of a thin film on a substrate by chemical reaction of gases. Such a deposition process is referred to as chemical vapor deposition (CVD). Thermal CVD processes supply reactive gases to the substrate surface where heat-induced chemical reactions take place to produce a desired film. The high temperatures at which some thermal CVD processes operate can damage metal layers on device structures. Plasma enhanced CVD (PECVD) processes, on the other hand, promote excitation and/or disassociation of the reactant gases by the application of radio frequency (RF) energy to a reaction zone proximate to the substrate surface, thereby creating a plasma of highly reactive species. The high reactivity of the released species reduces the energy required for a chemical reaction to take place and thus lowers the required temperature for such CVD processes.
The relatively low temperature of a PECVD process makes such a process suitable for the formation of insulating layers over deposited metal or polysilicon layers. One common film for such insulating layers (also referred to as dielectric layers) is silicon oxide. Silicon oxide films are well suited for use as dielectric layers because of their good electrical and physical properties.
Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. During that time, integrated circuits have generally followed the two year/half-size rule (often called "Moore's Law") which means that the number of devices which will fit on a chip doubles every two years. Today's semiconductor fabrication plants routinely produce devices with feature sizes of 0.5 microns or even 0.25 microns, and tomorrow's plants will be producing devices with even smaller feature sizes.
As feature sizes become smaller and integration density increases, it becomes important that certain film characteristics be kept within specified ranges. One such characteristic is the intrinsic stress level of the deposited films. Specifically, it is important that manufacturers of smaller geometry devices be able to control the stress level of deposited layers. Intrinsic stress levels above or below certain values may cause a substrate to bow or crack or to form voids or other defects. The reduction in feature size compounds this problem. Although the absolute stress (measured in dynes/cm.sup.2 or dynes/cm.sup.3) may be no greater, the reduction in feature size causes a reduction in the feature's ability to withstand a given amount of force.
Smaller feature sizes have resulted in increased aspect ratios (the ratio of a feature's height or depth to its width). The result is narrow spaces or "gaps" (e.g., the space between metal lines) which are difficult to fill using conventional CVD methods. A film's ability to completely fill such gaps is referred to as the film's "gap filling" ability.
Finally, some conventional CVD processes cause variations in deposition rates, according to the geometry of the underlying feature. Such phenomena can, create voids in the bottom of gaps (e.g., if the metal lines are close enough together, the deposited layer closes the top of the gap before the gap is completely filled). Given these problems, the electrical and physical characteristics of some silicon oxide films deposited using some standard PECVD methods are no longer sufficient for many contemporary applications.
A promising solution to improve gap filling properties is the use of HDP-CVD systems, which employ RF coils to generate an inductively coupled plasma under low-pressure conditions. The density of such a plasma is approximately two orders of magnitude or more greater than the density of a standard, capacitively coupled PECVD plasma. It is believed that the low chamber pressure employed in HDP-CVD systems provides active species having a long mean-free-path. This factor, in combination with the plasma's density, contributes to a significant number of constituents from the plasma reaching even the deepest portions of closely spaced gaps, providing a film with excellent gap filling capabilities. Also, an HDP plasma's high density promotes sputtering during deposition. It is believed that the sputtering element of HDP deposition slows deposition on certain features, contributing to the increased gap filling ability of HDP deposited films.
Some HDP-CVD systems introduce argon or a similar heavy inert gas to further promote the sputtering effect and provide better gap-fill characteristics for a given film. Some of these HDP-CVD systems and others employ capacitively coupled electrodes that create an electric field to bias the plasma toward the substrate. The electric field is initiated at the same time RF power is applied to the inductive coil and is maintained throughout the HDP deposition process. Such biasing can still further promote sputtering and provide better gap fill characteristics. The use of such HDP-CVD systems is therefore becoming increasingly important. For a variety of reasons not yet well understood, however, films created in such HDP-CVD systems exhibit higher stress than those created in conventional capacitively coupled PECVD systems. Controlling this increased stress is an important issue.
In the past, the stress in HDP films has been reduced by depositing a low-stress PECVD or other type of non-HDP film over the HDP film. This dual layer (high-stress/low-stress) approach allows for the intrinsic stress of HDP films to be controlled to within an acceptable range. Such an approach, however, also increases processing time and thus decreases throughput as substrates are transferred from an HDP-CVD system to a PECVD or other type of system. Even if deposition of the composite layer could take place in a single system, substrate throughput would still be adversely affected while process conditions such as pressure and temperature are adjusted for deposition of the two different layers. Accordingly, it is desirable to control and reduce the stress in silicon oxide and similar films formed by HDP-CVD and other processing techniques.